R-7HE MK2

In order to completely eliminate the influence of jitter in the incoming signal, the R7 HE MK2 uses an asynchronous clocking process.
First it reads and stores a considerable amount of signal source data to RAM, discard the clock of the signal source, and directly use the high-performance built-in Accusilicons to clock the output from the RAM. Since both data and clock are handled by the FPGA, the impact of transmission on jitter is neglectable. The jitter level is essentially the same as what is specified for the TCXO clocks used by the R7 HE MK2.

The key to this processing method is to ensure the integrity of data transmission, which is our technical secret. Realize that as soon as a single data sample within a million is lost in the transmission, a sharp and obvious cracking sound, like static, or a scratch on a vinyl, will be heard during playback.

Features of R-7HE MK2:
It has been 4 years since the R-7HE was launched in 2017. Thanks to the fully programmable circuits of the R-7HE, we have continuously updated the firmware to improve the owner experience，
We will continue to update the current R-7HE, even if we are now launching a new hardware design with the R-7HE MK2.
The R-7HE MK2 was designed and tested at the beginning of 2020, which was followed by a year of continuous audition, software and hardware fine-tuning. Productions and sales were not scheduled until we were fully satisfied with how realistic the sound was. The improvement is quite obvious compared to the previous generation.
1. Using the latest designed discrete servo stabilized power supply to feed the digital circuits, the noise level is comparable to that of a battery, but without the dry and thin sound characteristics of it, and thus the product's operating temperature is significantly lower than that of the previous model. The clock circuit and the analog circuit are still powered by a pure class-A regulated power supply for the best sound results(New upgrade)
2. By listening to a turntable and studying its sound for a long time, we have successfully integrated the analog vinyl sound characteristics into this product, this being allowed optionally through the front panel.(New feature)
3. Both the USB and HDMI inputs are equipped with isolators, and two sets of linear power supplies to separately supply power to the USB and HDMI modules before the isolators to prevent interference from signal sources.
a, USB uses a two-way transmission isolator, which not only transmits IIS signals to the FPGA processor, but also receives the synchronous clock signal sent by the FPGA processor. The USB interface itself is no longer equipped with clocks. The synchronous clock is applied to make the signal transmission more accurate and upgrade sound quality to an excellent level. The sound quality is now in fact better then with the previous generation R-7HE fed by the DI-20 (not quite as good as with DI-20HE however).
b, the HDMI module is now equipped with an independent isolator to improve the sound quality of the HDMI input.
4. Display of the input signal sampling rate function.
5. The 10MHz clock input allows the use of an external clock generator.
6. The FPGA operates using the parallel data processing mode.
The IIS signal is serial data transmission. Each data bit requires one clock cycle. One frame of left and right channel data requires 64 clock cycles, so stability over a 64 clock cycles is needed.
The parallel mode only needs one clock to transmit and process the 32-bit data of the left and right channels, which greatly improves the processing speed and is less affected by the stability of the clock.
IIS input data (USB and HDMI-IIS) is reorganized into two sets of 32-bit parallel data as soon as it is inputted.  After the SPDIF signal is demodulated, it is also sent to the next level of processing through two sets of 24-bit parallel data. DSD data is also reorganized into two groups of 64-bit parallel data processing as soon as it is inputted.
According to listening comparisons, the parallel processing mode can make the sound clearer and more neutral, with better dynamics and a more analog flavor.
7. The clock management design of the new architecture makes the clock work more stably, which brings higher transparency and more details.
8. DSD uses the built-in asynchronous clock to enhance timing, which obviously improves the clarity and dynamics of reproduction.
9. SPDIF supports DOP playback.

Fully analog regenerative power technology:

The accuracy of the step resistance:
Many people only care about the accuracy of the step resistances because they think that R-2R depends essentially on the accuracy of the resistance.
Nowadays, 24 bit is a standard, but can the precision of manufactured resistors reach 24 bit? Even with only 16 bits, the accuracy requirement is 1/66536, and so 0.1% (1/1000) of accuracy is completely inadequate. In fact, 0.01% (1/10000) would still fail to meet the 16-bit requirement, let alone 24 bits.
Therefore, lowering accuracy of the resistance is not enough to solve the problem. If there were 0.00001% resistors available on the market, it would meet the requirement of 24 bits, but the inherent resistance of the switching devices would completely wipe out this super high accuracy advantage.
We need to solve the problem technically, not just improve the accuracy of the resistance. But we still use ultra-high precision resistors in our products.

Importunacy of the FPGA/CPLD:
On important thing to underline about the FPGA/CPLDs is that they are programmable logic array devices. Nowadays, FPGAs have been used in many high-end DAC products, such as the popular ROCKNA WAVEDREAM DAC.
Since 2008, we have used FPGA designs in DAC products. This machine is composed of one FPGA and 7 CPLDs at the heart of digital processing.
The hardware layout inside the FPGA can be designed and arranged through software, therefore the hardware can be upgraded through software updates.
As a benefit, this design has a high degree of flexibility. It allows improving sound quality, adding functions, and keeping the product up-to-date, all through software (firmware) updates.

Responsibilities hor the FPGA/CPLDs:
1. the FPGA implements a high-performance SPDIF demodulator (instead of using low-performance SPDIF demodulator chips such as DIR9001, WM8805, AK411X, etc...).
2. Combining clocking and FIFO technology to output data, it can be accurately synchronized to the clock, and thus reject jitter.
3. Built-in 2X, 4X and 8X digital filters and different NOS modes allow users to choose the tone that best suits their personal taste.
4. Simulate the tonality of vinyl disc playback through a unique design.

Fully discrete output stage:
The last stage in the signal journey is the analog output stage, and the output stage has a decisive influence on the sound quality of the DAC.
No matter how excellent digital circuit design is, without an excellent analog output stage design, the sound quality will become extremely ordinary.
The analog output stage is directly connected behind the DA 7 module, using only through-hole components (not SMD).
The high-speed ACSS amplifier is used for signal amplification and processing. The ACSS amplifier is designed without negative feedback and works in the current signal mode. It does not have to repeatedly transform the signal between current and voltage like other designs.
The output buffer stage is a single-ended pure class-A FET design, and the two groups are connected in parallel to achieve a lower output impedance. All in all, the output stage is working in a pure class-A state, with no negative feedback at all, so that it can reproduce pure and lifelike sound signals.
The DAC has four built-in operational amplifiers to serve in the DC servo function, so that the DAC can work without coupling capacitors, avoiding noise and coloration. In the whole signal channels following the DA module, no switching elements are used to achieve the truest and purest sound quality.

Please note:
This product applies the latest power technology. Therefore the working temperature has dropped significantly compared to the previous generation products. This allows leaving power on over the long term.
This product is burned-in for at least 300 hours before shipping.
We recommend burning it for an additional 300 hours for best results.
The quickest way to complete the burn-in of this product is to play music continuously. The amplifier can be turned off meanwhile, it will not affect the burn-in process.
Please power off the unit before connecting or disconnecting inputs or outputs.
Do not immediately power on the unit after powering it off. Wait for at least 30 seconds.

Normal working state display:
Leftmost digit:
Input channel indicator, either 1,2,3,4,5 or 6 ( for details, please read below ).
2nd digit:
Internal or External clock selection. When an external clock is connected, the dot on the bottom right corner will be lit to indicate the clock signal is detected ( for details, read below ).
The remaining digits:
Input signal sampling rate indicator; 44.1, 48.0,88.2, 96.0, 176, 192, 352 and 384 are for the PCM formats, while 064, 128, 256 and 512 are for the DSD formats.

Button functions：
Setting button:
Push the "Setting" button once, the leftmost digit will blink, which indicates it is selected. This allows changing the corresponding setting. Push the left "Selector" button to select the desired value. While the display is still blinking, push "Setting" again , the next digit to the right will be selected and blink. Push the right "Selector" button to select the digit to the left of the one currently selected.
While the rightmost digit is blinking, push the "Setting" button one time, the menu will change to page 2.

HDMI definitions :(Compatible with PS audio standard):